1. Field of the Invention
The field of this invention relates to a cross coupled oscillator, an integrated circuit comprising a cross coupled oscillator and an electronic device, for example comprising a charge pump and a high power radio frequency (RF) switch arranged to use a clock signal generated by the cross coupled oscillator.
2. Description of the Prior Art
In the field of radio frequency (RF) switches, such as RF silicon-on-insulator (SOI) switches, generally a negative bias is required in order to disable (turn ‘off’) the SOI switches under a large RF swing. The generation of a negative bias allows the RF switch designer to avoid the use of DC blocking capacitors. Such a negative bias is commonly generated by utilising a charge pump circuit, which requires an oscillator to generate the charge pump clock signals. An oscillator that is coupled to a charge pump circuit that generates a negative bias would typically exhibit low current consumption, and typically needs to be designed with a minimum possible spur current in order to avoid spurious signals for a wireless application.
Referring to FIG. 1, a known cross-coupled relaxation oscillator 100 is illustrated. Cross-coupling is a well-known oscillation architecture that is used to generate quadrature signals. The cross-coupled relaxation oscillator 100 comprises two cross connected first-order relaxation oscillators 102, 104 arranged in a feedback structure. The first-order relaxation oscillators 102, 104 comprise a basic and well-known resistor-capacitor (RC) 106, 108, 110 oscillator design, but may equally be formed using an integrator and a Schmitt-trigger (memory element) arrangement (not shown). The output of the first first-order relaxation oscillator 102 is 90° out of phase and used to trigger the second first-order oscillator 104.
In this case, the cross-coupling between the first-order relaxation oscillators 102, 104 is provided by a comparator that senses the zero-crossing in the integrator and provides a current signal to the second oscillator core. Hence, the second oscillator core is forced to switch in the middle of the half-period of the first oscillator core. Therefore, the outputs of first-order relaxation oscillator 102, 104 are 90° out of phase with each other, when swinging between VDD and ground. Notably, the first-order relaxation oscillators 102, 104 are arranged in parallel, with each using the VDD supply directly.
This cross-coupled oscillator design suffers from the fact that a significant static current exists, in addition to the current used to charge the capacitors. Additionally, the duty cycle is also dependent upon the NMOS threshold voltage matching between the first-order relaxation oscillators 102, 104, which is often subject to a large process variation.
Thus, there exists a need for an oscillator circuit, for example a cross-coupled oscillator circuit that is capable of producing a clock output for a charge pump in order to generate a negative bias for a high power RF switch and, in particular, an oscillator circuit that may support a lower current consumption and/or better duty cycle control.